M16C62P_06 Datasheet, PDF (268/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

M16C/62P Group (M16C/62P, M16C/62PT)
20. CRC Calculation
20. CRC Calculation
The Cyclic Redundancy Check (CRC) operation detects an error in data blocks. The microcomputer uses a generator
polynomial of CRC_CCITT (X¹⁶ + X¹² + X⁵ + 1) to generate CRC code.
The CRC code consists of 16 bits which are generated for each data block in given length, separated in 8 bit units.
After the initial value is set in the CRCD register, the CRC code is set in that register each time one byte of data is
written to the CRCIN register. CRC code generation for one-byte data is finished in two cycles.
Figure 20.1 shows the CRC Circuit Block Diagram. Figure 20.2 shows the CRC-related Registers.
Figure 20.3 shows the Calculation Example using the CRC Operation.
Data bus high-order
Data bus low-order
Eight low-order bits
CRCD register
Eight high-order bits
CRC code generating circuit
X¹⁶ + X¹² + X⁵ + 1
CRCIN register
Figure 20.1 CRC Circuit Block Diagram
CRC Data Register
(b15)
(b8)
b7
b0 b7
b0
Symbol
Address
After Reset
CRCD
03BDh to 03BCh
Indeterminate
Function
Setting Range RW
When data is w ritten to the CRCIN register after setting the initial value in 0000h to FFFFh
the CRCD register, the CRC code can be read out f rom the CRCD
RW
register.
CRC Input Register
b7
b0
Data input
Symbol
CRCIN
Function
Figure 20.2 CRCD and CRCIN Registers
Rev.2.41 Jan 10, 2006 Page 253 of 390
REJ09B0185-0241
Address
03BEh
After Reset
Indeterminate
Setting Range RW
00h to FFh
RW