|
M16C62P_06 Datasheet, PDF (47/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES | |||
|
◁ |
M16C/62P Group (M16C/62P, M16C/62PT)
2. Central Processing Unit (CPU)
2.8.8 Stack Pointer Select Flag (U Flag)
ISP is selected when the U flag is â0â; USP is selected when the U flag is â1â.
The U flag is cleared to â0â when a hardware interrupt request is accepted or an INT instruction for software
interrupt Nos. 0 to 31 is executed.
2.8.9 Processor Interrupt Priority Level (IPL)
IPL is configured with three bits, for specification of up to eight processor interrupt priority levels from level 0
to level 7.
If a requested interrupt has priority greater than IPL, the interrupt is enabled.
2.8.10 Reserved Area
When write to this bit, write â0â. When read, its content is indeterminate.
Rev.2.41 Jan 10, 2006 Page 32 of 390
REJ09B0185-0241
|
▷ |