M16C62P_06 Datasheet, PDF (65/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

M16C/62P Group (M16C/62P, M16C/62PT)
6. Voltage Detection Circuit
Low Voltage detection interrupt generation circuit
Low Voltage detection Circuit
VC27
DF1, DF0
00b
The D42 bit is set to “0” (not detected)
01b
by program. The VC27 bit is set to “0”
(voltage down detect circuit disabled),
10b
the D42 bit is set to “0”.
D4INT clock (the
11b
clock with which it ^1/8
1/2
1/2
1/2
operates also in
wait mode)
VC13
VCC1
VREF
+
Noise
Rejection
-
(Rejection Range : 200 ns)
Low Voltage
detection signal
The Low Voltage detection signal
becomes “H” when the VC27 bit is
set to “0” (disabled)
CM10
CM02
WAIT instruction (wait mode)
Watchdog Timer Block
Noise Rejection
Circuit
D42
Digital
Filter
D41
D43
Watchdog
timer interrupt
signal
Low Voltage
detection interrupt
signal
Non-maskable
interrupt signal
Oscillation stop,
re-oscillation
detection
interrupt signal
Watchdog timer
underflow signal
This bit is set to “0” (not detected) by program.
D40
Figure 6.5 Low Voltage detection Interrupt Generation Block
VCC1
VC13 bit in VCR1 register
sampling
sampling
sampling
sampling
Output of the digital filter ⁽²⁾
D42 bit in D4INT register
No low voltage detection interrupt signals are
generated when the D42 bit is “H”.
Set to “0” by program (not detected)
Low Voltage detection
interrupt signal
NOTES :
1. D40 bit in the D4INT register is set to “1” (low voltage detection interrupt enabled).
2. Output of the digital filter is shown in Figure 6.5.
Figure 6.6 Low Voltage Detection Interrupt Generation Circuit Operation Example
Rev.2.41 Jan 10, 2006 Page 50 of 390
REJ09B0185-0241