English
Language : 

M16C62P_06 Datasheet, PDF (153/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES
M16C/62P Group (M16C/62P, M16C/62PT)
15. Timers
f2 PCLK0 bit = 0
1/2
Clock prescaler
· Main clock
f1
· PLL clock
f1 or f2
XCIN
1/32
fC32
· On-chip oscillator
clock
PCLK0 bit = 1
1/8
f8
Set the CPSR bit in the
Reset
1/4
f32
CPSRF register to “1”
(= prescaler reset)
TB0IN
TB1IN
TB2IN
f1 or f2 f8 f32 fC32 Timer B2 overflow or underflow
(to a count source of Timer A)
TCK1 to TCK0
00
01
10
11
Noise
filter
TCK1 to TCK0
00
01
10
11
Noise
filter
TCK1 to TCK0
00
01
10
11
Noise
filter
1
0
TCK1
1
0 TCK1
1
0
TCK1
00: Timer mode
10: Pulse period / pulse width measurement mode
TMOD1 to TMOD0
Timer B0
Timer B0 interrupt
01: Event counter mode
00: Timer mode
10: Pulse period / pulse width measurement mode
TMOD1 to TMOD0
Timer B1
Timer B1 interrupt
01: Event counter mode
00: Timer mode
10: Pulse period / pulse width measurement mode
TMOD1 to TMOD0
Timer B2
Timer B2 interrupt
01: Event counter mode
TB3IN
TB4IN
TB5IN
TCK1 to TCK0
00
01
10
11
Noise
filter
TCK1 to TCK0
00
01
10
11
Noise
filter
TCK1 to TCK0
00
01
10
11
Noise
filter
1
0
TCK1
1
0
TCK1
1
0
TCK1
00: Timer mode
10: Pulse period / pulse width measurement mode
TMOD1 to TMOD0
Timer B3
Timer B3 interrupt
01: Event counter mode
00: Timer mode
10: Pulse period / pulse width measurement mode
TMOD1 to TMOD0
Timer B4
Timer B4 interrupt
01: Event counter mode
00: Timer mode
10: Pulse period / pulse width measurement mode
TMOD1 to TMOD0
Timer B5
Timer B5 interrupt
01: Event counter mode
TCK1 to TCK0, TMOD1 to TMOD0 : Bits in TBiMR register (i=0 to 5)
NOTES :
1. Be aware that TB5IN shares the pin with RXD2 and TA0IN.
Figure 15.2 Timer B Configuration
Rev.2.41 Jan 10, 2006 Page 138 of 390
REJ09B0185-0241