M16C62P_06 Datasheet, PDF (258/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

M16C/62P Group (M16C/62P, M16C/62PT)
18. A/D Converter
A/D Control Register 0 ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
10
Symbol
ADCON0
Address
03D6h
Bit Symbol
Bit Name
CH0 Analog Input Pin Select Bit
CH1
CH2
MD0
MD1
A/D Operation Mode Select
Bit 0
Trigger Select Bit
TRG
A/D Conversion Start Flag
ADST
Frequency Select Bit 0
CKS0
After Reset
00000XXXb
Function
RW
Invalid in single sw eep mode
RW
RW
RW
b4 b3
RW
1 0 : Single sw eep mode
RW
0 : Softw are trigger
_________
RW
1 : ADTRG trigger
0 : A/D conversion disabled
1 : A/D conversion started
RW
Ref er to NOTE 3 for the ADCON2 Registe r
RW
NOTES :
1. If the ADCON0 register is rew ritten during A/D conversion, the conversion result w ill be indeterminate.
A/D Control Register 1 ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
1
0
Symbol
Address
After Reset
ADCON1
03D7h
00h
Symbol
Address
After Reset
RW
A/D Sw eep Pin Select Bit ⁽²⁾
When single sw eep mode is selected
SCAN0
b1 b0
RW
0 0 : AN0 to AN1 (2 pins)
0 1 : AN0 to AN3 (4 pins)
SCAN1
1 0 : AN0 to AN5 (6 pins)
RW
1 1 : AN0 to AN7 (8 pins)
A/D Operation Mode Select Bit 1 Set to “0” w hen single sw eep mode is selected
MD2
RW
8/10-Bit Mode Select Bit
0 : 8-bit mode
BITS
1 : 10-bit mode
RW
CKS1
VCUT
Frequency Select Bit 1
Vref Connect Bit ⁽³⁾
Refer to NOTE 3 for the ADCON2 Register RW
1 : Vref connected
RW
OPA0
External Op-Amp Connection
Mode Bit
b7 b6
0 0 : ANEX0 and ANEX1 are not used
RW
0 1 : Do not set to this value
OPA1
1 0 : Do not set to this value
RW
1 1 : External op-amp connection mode
NOTES :
1. If the ADCON1 register is rew ritten during A/D conversion, the conversion result w ill be indeterminate.
2. AN0_0 to AN0_7, and AN2_0 to AN2_7 can be used in the same w ay as AN0 to AN7. Use the ADGSEL1 to
ADGSEL0 bits in the ADCON2 register to select the desired pin. How ever, if VCC2 < VCC1, do not use AN0_0 to
AN0_7 and AN2_0 to AN2_7 as analog input pins.
3. If the VCUT bit is reset from “0” (Vref unconnected) to “1” (Vref connected), w ait for 1 µs or more before starting
A/D conversion.
Figure 18.7 ADCON0 Register and ADCON1 Register (Single Sweep Mode)
Rev.2.41 Jan 10, 2006 Page 243 of 390
REJ09B0185-0241