MB87P2020 Datasheet, PDF (99/356 Pages) Fujitsu Component Limited. – Colour LCD/CRT/TV Controller

1 Functional Description
Pixel Processor
The Pixel Processor (PP) is a component of the Graphics Display Controller (GDC), which realizes the main
functions “drawing of geometrical functions” and “writing and reading single pixel” to and from Video
RAM. It is implemented in the GDC design between User Logic Bus Interface (ULB) and the SDRAM Con-
troller (SDC)/Anti Aliasing Filter (AAF), in reference to block diagram in GDC specification. The PP con-
sists of three separate devices (execution devices) and other submodules. The execution devices are the
Pixel Engine (PE) for drawing function, the Memory Access Unit (MAU) for single pixel access and the
Memory CoPy unit (MCP) for copying rectangular areas. The submodules are Control Interface, ULB In-
terface, the SDC Interface and the fifos for pixel addresses and pixel data.
More information about the internal module can be found in the corresponding chapters and sections.
1.1 Overview
1.1.1 PP Structure
Pixel Processor
SDC-Inter-
SDC/AAF
SDC bus
Fifo
Addr Data
PE
MAU
MCP
CTRL-Interface
ULB-Interface
control bus
Command control
and Data
ULB
Figure 1-1: PP block diagram
The internal structure of PP is shown in figure 1-1. It consists of the execution devices (PP, MAU, MCP)
and the submodules Control interface, ULB interface and SDC interface. The ULB block in the figure 1-1
Functional Description
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