MB87P2020 Datasheet, PDF (119/356 Pages) Fujitsu Component Limited. – Colour LCD/CRT/TV Controller

1 Overview
DIPA Direct/Indirect Physical Access
The purpose of the DIPA device is to provide video memory (frame buffer) access methods for the MCU
without the need of the Pixel Processor inside the graphic display controller (GDC) to be used. This is per-
formed by using physical SDRAM write and read access. The data words in video memory can be accessed
with raw physical addresses.
SDRAM Controller
DIPA
Config
IPA Prio
DPA Prio
IFMAX
IFMIN
OFMAX
OFMIN
SDC interface
IPA
DPA
IFIFO
OFIFO
ULB
Figure 1-1: DIPA Block Diagram within GDC environment
The function divides into two blocks, DPA (Direct Physical memory Access) and IPA (Indirect Physical
memory Access).
DPA is for direct memory mapped video RAM access, address range of video RAM has a certain offset
regarding GDC internal mapping and GDC Chip Select address mapping of MCU address space. Data trans-
fer over DPA are single word, half word or byte accesses. Each single access has to be arbitrated with com-
peting GDC devices GPU, VIC and PP by the SDRAM Controller (SDC), therefore this method of direct
frame buffer access is relative slow.
IPA offers also the possibility to have physical access to the video RAM. Main advantage is that the transfer
is executed in a buffered manner over the input and output FIFOs. Addressing is done without any address
offset calculation required. Physical address is transferred as parameter from 0 to the upper bounds of video
memory size. Data blocks can be transferred with a given block size and start address. The slow-down due
Overview
Page 119