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MB87P2020 Datasheet, PDF (49/356 Pages) Fujitsu Component Limited. – Colour LCD/CRT/TV Controller
User Logic Bus
Table 1-5: Register address space for GDC
Priority
Address range
ULB addressed Target component/Register
component
0xFC00 - 0xFC07
CU
0xFC08 - 0xFCFF
2
Reserved area
0xFD00 - 0xFD0F
emptyc
SPB
0xFD10 - 0xFFFF
emptyc
0x0024 - 0x009F
ULB
0x0100 - 0x0217
SDC
0x1000 - 0x1243
GPU - LDR
0x1300 - 0x1383
GPU - MDR
0x1400 - 0x140F
GPU - MTXb
Lavender: 0x2000 - 0x23FF
Jasmine: 0x2000 - 0x27FF
GPU - CLUT
3
0x2800 - 0x2BFF
CTRL
GPU - GAMMAb
0x3000 - 0x3263
GPU - DIR
0x3270 - 0x3273
GPU - SDC
0x4000 - 0x403B
VIC
0x4100 - 0x4133
PP
0x4200 - 0x420B
DIPA
0x4400 - 0x4407
CCFL
0x4500 - 0x450F
AAF
4
other display controllers (see
table 1-4)
-
emptyc
5
SDRAM window1 range
DPA
SDRAM
6
SDRAM window0 range
DPA
SDRAM
7
Empty area within SDRAM
space
-
emptyc
a. Refer to section 1.6 for an explanation of register access types.
b. Jasmine only
c. A special ’empty’ signal is generated because the ULB is not allowed to drive the data bus for a read access
inside an empty area while the I/O Controller detects a valid read access.
1.4.3 SDRAM space
For direct SDRAM access two independent windows can be set within ULB for one display controller. The
term ’window’ means that a part of the SDRAM memory can be blended into the MCU address space. Win-
dows can be set up by defining window parameters within ULB’s register space. Before an established win-
dow is useable the SDRAM space has to be enabled. The following parameters can be used to set up
SDRAM windows (see also figure 1-4):
Functional description
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