MB87P2020 Datasheet, PDF (35/356 Pages) Fujitsu Component Limited. – Colour LCD/CRT/TV Controller

Clock Unit
2.1.6 Maximum Power Consumption
This is the maximum power consumption of the PLL when PLL is in locked state. The power dissipated by
extrenal dividers is not included into this amount.
2.2 Usage Instructions
• Input the clock of crystal oscillator level into the CK pin of the PLL. Variations in the input clock
directly affects the PLL output, leading to unconformity to the specifications.
• In addition to the normal power supply, the PLL has a power supply for VC0 (pin name:
APLL_AVDD, APLL_AVSS). The VC0 power supply should be separate from other power supplies.
APLL Specification
Page 35