MB87P2020 Datasheet, PDF (56/356 Pages) Fujitsu Component Limited. – Colour LCD/CRT/TV Controller

MB87J2120, MB87P2020-A Hardware Manual
Note that some commands use the input FIFO and internal buffers for collecting data before processing
them. Therefore an application can not expect that all data are processed immediately. This can lead to an
incomplete drawing of figures or to an incomplete memory transfer depending on running command. The
input FIFO and all internal buffers will be forced to flush when the next command is sent to display con-
troller.
The amount of collected data depends on executed command and can be programmed in separate registers.
These registers are REQCNT for all Pixel Processor commands and DIPAIF for physical memory access
commands (PutPA and GetPA).
Write commands can be executed with any amount of data in this way. The next command can be written
to command register after all data have been sent to input FIFO (see figure 1-8). This causes the termination
of previous command inclusive input FIFO and internal buffer flushing and the start of the new command
itself. If only a buffer flushing should be performed and no more commands have to be executed a NoOp
command can be used for this purpose.
For read commands (GetPixel, XChPixel)¹ the scenario is a bit more complex. Due to the buffer usage
of input FIFO and internal buffers the display controller does not process all data. As a result not all expect-
ed read data can be found in output FIFO. A read loop over the expected amount of data would hang because
not all data are available in FIFO.
A possibility to force the display controller to fill the output FIFO with the expected amount of data is to
send a new command to command register. This can be the next command that has to be executed (including
command buffered registers as described above) or in order to keep the code simple and readable a NoOp
command (see also figure 1-8).
Another possibility is to set the register REQCNT which controls the buffered data amount to ’0’. This forces
a single transfer for every written data word. Note that this setting decreases performance compared to larg-
er values of REQCNT because no burst accesses to video memory are possible.
For data amounts larger than output FIFO size a division of data stream into packages is necessary. For each
of these packages the command flow according to figure 1-8 should be applied.
If an application wants to transfer a complete package at once without checking FIFO load for every data
word for instance via DMA or within an interrupt controlled application it is possible that not all data appear
in output FIFO and the initialized limit is not reached. Even if the next command was sent after GetPixel
or XChPixel which is normally suitable to flush input FIFO data flow blocking is not escaped.
Note that this behaviour does not occur if output FIFO is read with flag polling for every data word be-
cause the amount of words in output FIFO falls below the limit FIFOSIZE-REQCNT-1 at a certain time.
GetPA is not affected because it uses other registers than REQCNT for block size calculation as already
mentioned.
A possibility to utilize the full output FIFO size is to ensure that always REQCNT+1 words can be placed
in output FIFO. This limits the maximal package size (number of words to transfer for one output FIFO fill)
for a given REQCNT. The maximal package size can be calculated according to (1).
pkg_size ≤ trunc( _{----F----I--F---O----S----I--Z---E------} ) × (REQCNT + 1)
(1)
REQCNT + 1
The function ’trunc’ in (1) means that only the natural part of this fraction should be taken for calculation.
The parameter ’FIFOSIZE’ is the size of output FIFO according to table 1-10. Note that ’pkg_size’ is
the maximal package size, sizes smaller than the calculated size can be used.
Figure 1-9 shows an example how to read back large data amounts from display controller. The shown func-
tion reads back a complete bitmap defined by a pointer to the structure ’S_BM’ (’bm’).
The example for automatic calculation of pkg_size is given to show whole FIFO and command usage mech-
anism and to point out differences between Jasmine and Lavender implementations.
In order to calculate required package size GetBM reads back the register REQCNT², determines the correct
output FIFO size with help of chip ID and calculates the required package size according to (1).
For every data package the command execution flow described above is used. It is nested into a double loop
1. GetPA is also a read command but it is a so called ’finite’ command which gets the number of data to trans-
fer within a special register. This command is not concerned by this discussion.
2. G0REQCNT addresses the REQCNT register for GDC with number ’0’ (see chapter 1.4).
Page 56