MB87P2020 Datasheet, PDF (197/356 Pages) Fujitsu Component Limited. – Colour LCD/CRT/TV Controller

Graphic Processing Unit
Gamma Settings (Jasmine only)
If there is any post processing required after matrix multiplication then this can be accomplished for any
function I_gam = f (I_mtx) by loading appropriate values into the gamma tables (bits [23:0] of addresses
0x2800…0x2BFC). In order for the gamma conversion to take affect the gamma enable flag (bit [7] of ad-
dress 0x1300) must be set.
4.2.3 User preferences
In general, all layer specific settings (positions, color resolution, blink/transparency color, blink rate, line
doubling) are unlimited at the user’s command¹. Further, blink enables, Z-order, and CLUT offsets can also
be chosen arbitrarily. When displaying YUV422 image data chroma interpolation can be switched on to im-
prove image quality. It is also up to the user to switch on line doubling, especially for video data fetched by
VIC.
The contents of the color look-up table is also free to choose, with the only limitation that the effective bit
width of the contents is determined by the intermediate color space. This limitation applies also to the back-
ground color. A similar limitation holds for the color key limits, but with the physical color space.
Duty ratio modulation (cf. 3.8) may be applied to improve the impression of the image displayed. Its usage
depends on the physical color space and intermediate color space. For the mappings [intermediate 4bbp to
physical 1bpp] and [intermediate RGB222 to physical RGB111] duty ratio modulation is used, hence, the
values for the pseudo levels to be generated have to be entered into the respective registers (addresses
0x1380 to 0x13B4).
4.3 GPU Initialization Sequence
In order to ensure a correct operation of the connected display as well as for the GPU itself control data has
to be entered in a certain sequence. Further, not every control register may be written at any given time.
Basically, information that defines display timing can not be changed after MasterTimingOn has been
set to one.
Initialization should be carried out as follows:
7. Determine parameters of the display physically connected to the GDC and derive timing characteris-
tics. Load the values into the appropriate registers.
8. Determine what interface signals are needed and enable them by setting the values in
DIR_MainEnable.
9. Load the contents of the CLUT, if needed.
10. Derive the necessary intermediate color space (dependent on the physical color space), using tables
2-2 and 2-3.
11. Determine whether matrix multiplication is necessary. If so, load pre matrix biases and matrix coeffi-
cients (when differing from defaults). If post processing of matrix results is required load gamma
tables with appropriate contents.
12. Load the Duty Ratio Modulator registers, if needed.
13. Set layer geometry by loading the respective layer description record registers.
14. Now, MasterTimingOn may be set, thus starting signal generation at the output pins. If the Z-order
register remained unchanged in reset state, all pixels are displayed in background color.
During normal operation, color attributes (layer, blinking, transparent, background, CLUT contents) may
be set at any time and take effect immediately. Changing layer color spaces, layer position parameters or
Z-order register contents affects the display at the start of the next frame being fetched from video RAM²
1. There is a limitation concerning the color space in that there has to be a legal mapping to the intermediate
color space, as given in table 2-1.
GPU Register Set
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