MB87P2020 Datasheet, PDF (46/356 Pages) Fujitsu Component Limited. – Colour LCD/CRT/TV Controller

MB87J2120, MB87P2020-A Hardware Manual
mine supports level and edge triggered interrupt requests with programmable edge length while Lavender
is only supporting level triggered interrupt requests.
In level triggered interrupt mode the interrupt request is only reset if the flag which causes this interrupt is
also reset. Because of software flag reset the request signal is stable for a very long time and no internal
handshake mechanism is needed.
In difference to level triggered interrupt edge triggered interrupt reacts on a rising edge of a flag. This edge
causes a pulse of programmable length on interrupt request signal.
1.3.4 Output signal configuration
In order to allow flexible system integration both display controllers allow configuration for some output
signals to MCU. This includes an option to signal inversion and a tristate control in order to allow external
pull up resistors.
If the tristate control is enabled the according pin drives tristate (’Z’) instead of high level (’1’) while low
level (’0’) is driven in any case (emulated open drain).
Table 1-3 contains the settings for all configurable signals (ULB_DREQ, ULB_DSTP and ULB_INTRQ)
Table 1-3: Control for feedback signals
Signal
ULB_DREQ
ULB_DSTP
ULB_INTRQ
ULB_RDY
Setting
tristate
invert
tristate
invert
tristate
invert
tristate
invert
Lavender
Register: DMAFLAG_TRI
Register: DMAFLAG_INV
Register: DMAFLAG_TRI
Register: DMAFLAG_INV
Register: DMAFLAG_TRI
Register: DMAFLAG_INV
no control possible
no control possible
Jasmine
Register: IFCTRL_DRTRI (1: tristate)
Register: IFCTRL_DRINV (1: invert)
Register: IFCTRL_DSTRI (1: tristate)
Register: IFCTRL_DSINV (1: invert)
Register: IFCTRL_INTTRI (1: tristate)
Register: IFCTRL_INTINV (1: invert)
Pin: RDY_TRIEN (1: tristate)
Pin: MODE[3] (1: invert)
valid for both display controllers. In Jasmine additionally ULB_RDY can be controlled by special pins¹.
Note that there are differences in controlling the signal behaviour between Lavender and Jasmine. While in
Lavender the signals ULB_DREQ, ULB_DSTP and ULB_INTRQ are controlled together with two register
Bits for tristate and inversion (DMAFLAG_TRI and DMAFLAG_INV) in Jasmine every signal has its own
control (see table 1-3).
1.4 Address decoding
1.4.1 Overview
The useable address space for display controller chip select signal (ULB_CSX) is 2²¹ Byte (2 MByte) and
the available space is divided into one configuration register space where all configuration registers are lo-
cated and one SDRAM space were SDRAM windows can be established and accessed This space is con-
figurable. Figure 1-3 shows the address space with the default settings for SDRAM space of Lavender and
Jasmine.
1. A register based control is not possible because read accesses would potentially not work in this case or the
MCU may hang with a wrong signal.
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