MB87P2020 Datasheet, PDF (144/356 Pages) Fujitsu Component Limited. – Colour LCD/CRT/TV Controller

MB87J2120, MB87P2020-A Hardware Manual
ULB. START selects one of the two signals (VIC-start or GPU-start) and allocates it to FLNOM_VICSYN.
This is a useful feature to synchronize anything on picture start controlled by software.
Related register: VICRLAY
bits[20:16] Bus Shuffler (SHUF)
clock
A
B
Ports
a0 a1 a2 a3 a4 a5 a6 a7 a8 a9
b0
b2
b4
b6
b8
AP
a0
a2
a4
a6
a8
AD
a-1
a0
a2
a4
a6
AN
a1
a3
a5
a7
a9
B
b0
b2
b4
b6
b8
Internal Buses
Figure 3-7: Definition of port - internal bus - assignment
VIC owns two data ports which are splitted into four internal busses (figure 3-7). To get more flexibility
(i.e. connect another external video controller to VIC without changing the board) VIC includes various
functions:
• clock invert function (CLKPDR[12])
• byte swap to exchange ports A and B
• bus shuffler to exchange internal busses (all combination are possible, see table 3-2)
A schematic overview about data path are given in figure 3-8. Note that contradictory settings can abrogate
each other (i.e. setting SHUF=2 abrogates setting VICCTRL_BSWAP=1).
PORT A
PORT B
byteswap
VIC
CLKV
AP
AP
AD
AD
AN
AN
B
B
VIC_DCU
shuff
CLOCK_UNIT
vii
Figure 3-8: Schematic overview about busshuffler function
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