MB87P2020 Datasheet, PDF (87/356 Pages) Fujitsu Component Limited. – Colour LCD/CRT/TV Controller

SDRAM Controller
/* ... before this section of code INIT_GDC from mkctrl tool was included */
ClrLayer(0x008080, 0);
ClrLayer(0x008080, 1);
/* ... here initialization of window handles W0...W2 is normally included */
xoff = 30;
yoff = 45;
aafen = 1;
/* DEMONSTRATION OF PHYSICAL ACCESS - DRAW ORIGINAL PATTERN */
puts (&W0, "[1] Drawing original pattern\n");
DrawRect (0xd0d000, 0, xoff, yoff, 100, 100);
GDC_CMD_NOP();
PXP_AAF_THE(aafen);
/* Cancel DwRect before AAF enable */
for (ang=0; ang<6.2828; ang+=0.15707) {
recx = (word) (50*sin(ang));
recy = (word) (50*cos(ang));
DrawLine(0x000000, 0,
(xoff+50)<<aafen, (yoff+50)<<aafen,
recx<<aafen,
recy<<aafen);
}
GDC_CMD_NOP();
PXP_AAF_THE(0);
/* draw radiancies */
/* double size if AAF enabled */
/* DEMONSTRATION OF PHYSICAL ACCESS - COPY TO DESTINATION WOINDOW */
puts (&W0, "[2] Copy using physical access\n");
for (x=xoff; x<xoff+100; x++) {
for (y=yoff; y<yoff+100; y++) {
src = phy_address(0, x, y);
dest = phy_address(1, x, y);
*(dword *)dest = *(dword *)src;
}
}
puts (&W0, "[3] finished.\n");
Figure 1-8: Excerpts from main program of the physical copy example
The example given in figure 1-8 did not use polling of DPA_RDY flag. The information that the DPA de-
vice is ready for writing is implicitly given by the finished read access before. DPA has a two-stage buffer
and read access is synchronized by using the hardware flow control over ULB_RDY line. The following
write access has at least one free buffer available.
/* build required format of pixel address */
dword pix_address (byte layer, word x, word y) {
return (x << 16) + y + ((layer&0x0C) << 28) + ((layer&0x03) << 14);
}
Figure 1-9: Formatting logical address from Layer, X, Y
Function Description
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