MB87P2020 Datasheet, PDF (344/356 Pages) Fujitsu Component Limited. – Colour LCD/CRT/TV Controller

MB87J2120, MB87P2020-A Hardware Manual
2.5 SDC sequencer readback
For Lavender the SDC sequencer is not readable in 16bit data mode (pin MODE[2]=0). Normally the se-
quencer data will only be written once at initialization time. A readback of sequencer data is usually not
necessary.
This problem has been fixed for Jasmine.
Table 2-7 gives an overview and a classification about the described problem.
Table 2-7: Overview for SDC sequencer readback
Subject
Description
Classification
Effects without
workaround
Solution/Workaround
Concerned devices
Testcase
Description
The SDC sequencer can not be read back in 16bit data mode.
HW limitation
Lavender delivers wrong data when the SDC sequencer is read in 16bit data
mode.
None.
This problem has been fixed for Jasmine.
MB87J2120 (Lavender)
fixed for MB87P2020 (Jasmine)
fixed for MB87P2020-A (Jasmine redesign)
EMDC: CTRL.1 (I/O march)
2.6 Direct SDRAM access with 16bit and 8bit data mode
Lavender and Jasmine can perform a memory mapped SDRAM access (see hardware manual sections for
ULB and DIPA for further details). In the case of 16bit (halfword) or 8bit (byte) read access from SDRAM
wrong read data may be delivered for some addresses for Lavender.
Direct SDRAM write access works for all data sizes (32,16 and 8bit).
To avoid this problem 32bit (word) access should always be used for SDRAM read access. There is no re-
striction for read access from register space¹.
For Jasmine this problem is solved and every data size can be used for reading from SDRAM.
Table 2-8 gives an overview and a classification about the described problem.
Table 2-8: Overview for direct SDRAM access with 16bit and 8bit data mode
Subject
Description
Classification
Effects without
workaround
Description
Read access from SDRAM space with 16bit (halfword) and 8bit (byte) data
size may deliver wrong values for some addresses.
HW limitation
The MCU reads wrong data from an address mapped to Lavender SDRAM
space when reading a 16bit (halfword) or 8bit (byte) value.
Reading a 32bit (word) value from SDRAM space works as well as reading
from register space.
1. The GDC address space is divided into register and SDRAM space. See chapter B-2.1.4 in hardware manual
for further details.
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