MB87P2020 Datasheet, PDF (335/356 Pages) Fujitsu Component Limited. – Colour LCD/CRT/TV Controller

Hints and Restrictions
A good workaround is to configure Layer 0 with the same parameters as the target layer¹ and make all draw-
ings to layer 0. The advantage is that no layer number has to be merged into pixel addresses.
After drawing access to the layer data is possible via target layer configuration. Also GPU can be set up to
target layer.
Table 1-4 gives an overview and a classification about the described problem.
Table 1-4: Overview for MAU commands
Subject
Description
Classification
Effects without
workaround
Solution/Workaround
Concerned devices
Testcase
Description
For Jasmine target layer register (PPCMD_LAY) is ignored for MAU com-
mands even if PPCMD_ULAY is set to ’1’.
Hint
Commands PutPixel, PutPxWd, PutPxFC, GetPixel and XChPixel uses
only the target layer delivered in input FIFO.
See command list for a detailed command syntax description.
Use Layer 0 as a temporary drawing layer (see description for further
details).
MB87J2120 (Lavender)
partly fixed for MB87P2020 (Jasmine)
partly fixed for MB87P2020-A (Jasmine redesign)
EMDC: SDC.LOG2PHY
1.5 Pixel Processor (PP) double buffering
The Pixel Processor contains a double buffering mechanism for its registers which is synchronized to com-
mand execution.
Data are always written to configuration register which is not used for command execution. Instead of con-
figuration register directly an internal register is used for data storing during command execution. The time
to write internal register is determined by hardware.
For reading from PP registers an application can choose whether to read from configuration register
(READINIT_RCR=1) or to read from internal register (READINIT_RCR=0).
For bitwise modification of pixel processor configuration registers the double buffering mechanism has to
be considered. If parts of the registers should be changed with read-modify-write operations there is the risk
to read from internal double buffered register and write the result to the external register back. Data incon-
sistency could be the result. It is recommended to initialize READINIT_RCR=1 to have read access to the
external registers too (same register is accessed for reading and writing). Note that the reset value is
READINIT_RCR=0 and has not the recommended value.
Table 1-5 gives an overview and a classification about the described problem.
Table 1-5: Overview for PP double buffering
Subject
Description
Classification
Description
Application note for READINT register and its consequences.
Hint
1. In this case layer 0 is a temporary layer only; it should not be used for normal drawings.
Special hints
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