MB87P2020 Datasheet, PDF (275/356 Pages) Fujitsu Component Limited. – Colour LCD/CRT/TV Controller

AC Characteristics
2.5 AC Characteristics
2.5.1 Measurement Conditions
For the determination of GDC timing values three independent conditions are used:
4. External capacities: 20pF and 50pF.
Internal capacitance of the pin itself is included in this measurement condition (20/50pF already
including 5...7pF pin capacitance) and has to be subtracted from external capacitive load.
5. Operating conditions: maximum conditions (min. voltage/max. temperature/slowest process) and
minimum conditions (max. voltage/min. temperature/fastest process).
The allowed values for voltage and temperature are described in the operating condition chapter.
6. Timing path: longest and shortest (internal) path to/from a given output/input pin.
For every timing type for input and output signals always the worst case for the environment circuits is listed
in this specification. Table 2-5 shows the used conditions for all signal types in this specification.
Input setup and hold timings are minimum requirements from the application point of view, thus specified
in the “Min” column. However the input parameters are evaluated at maximum operating conditions and
longest timing path (see table 2-5).
For tri-state outputs the timing is evaluated for the 0 -> Z and 1 -> Z transitions without any load capacitance
dependency. Measurement points are defined if current through the output pin becomes below 5% of its
nominal value. The voltage level at the output pin is not of interest when switching into high-Z state. The
timing of voltage level in high-Z state depends only on the external RC combination and is not related to
this AC specification.
2.5.2 Definitions
Figure 2-1 shows the definition of setup and hold relations for inputs (DIN1...3) and hold and delay relations
for outputs (DOUT1...2) regarding the interface clock pin. DIN2, DIN3 and DOUT2 are special cases when
negative setup or hold timings are given.
CLK
tS
tH
DIN1 _{0011001100110011001100110011}
001100110011001100110011001100110011001100110011001100110011001100110011
tH
−tS
DIN2 _{001100110011001100110011001100110011001100110011 00110011001100110011001100110011001100110011001100110011001100110011}
tS
−tH
DIN3 _{001100110011001100110011 00110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011}
tOD
tOH
DOUT1 _{0011001100110011001100110011001100110011001100110011 D1 00110011 D2 0011001100110011}
−tOH tOD
DOUT2 _{001100110011001100110011001100110011001100110011 D1 0011001100110011 D2 00110011001100110011001100110011}
Figure 2-1: Input and Output Timing Relations
Table 2-5 shows the kind of timing values defined in this specification, its symbols and the evaluation con-
ditions used to determine a specific value according to chapter 2.5.1.
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