MB87P2020 Datasheet, PDF (217/356 Pages) Fujitsu Component Limited. – Colour LCD/CRT/TV Controller

2 Signal Waveform
CCFL Driver
2.1 General Description
The following figure shows a waveform example for the external signals and the synchronisation signal.
One cycle consists of five phases, a start-up phase, ionisation phase, pause, flash phase and the remaining
time until the rising edge of the synchronisation signal.
1 sync period (normally display frame)
SYNC
IGNITE
OFF
FET1
FET2
Start−up Phase Ignition Phase Pause
Flash Phase
Off Time
fixed setup
flash duration modulation
Figure 2-1: Principle waveform of output signals relative to SYNC
The duration of the start-up phase is fixed, the duration of the following three phases is determined by the
values of the registers IGNITE, PAUSE and FLASH. Normally IGNITE and PAUSE values are fixed setup
to be optimal for the lamp characteristics. Brightness modulation is done by changing the duration of the
FLASH phase.
Table 2-1 describes the values of the external signals in each phase. While FET1 and FET2 directly control-
ling the voltage converter, IGNIT and OFF are for controlling the height of input voltage or to disable it
completely.
Table 2-1: Phases of one CCFL cycle
Signal
FET1/FET2
Start-up
phase
low
Ionisation
phase
pulsed^a
Value
Pause
low
Flash phase
pulsed^a
Remaining
time
low
IGNIT
high
high
low
low
low
OFF
low
low
low
low
high
a.see section 2.3
2.2 Duration of the Phases
The duration of the certain phases is determined by the value of the prescaler register SCALE and the values
of the registers IGNITE, PAUSE and FLASH. The value of the prescaler register defines a base period,
which is used to derive pulse shapes and duration of the phases.
t_bper = t_CLK · SCALE
Signal Waveform
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