MB87P2020 Datasheet, PDF (86/356 Pages) Fujitsu Component Limited. – Colour LCD/CRT/TV Controller

MB87J2120, MB87P2020-A Hardware Manual
has to wait for higher prioritzed jobs an the currently running task for completion. Thus only a slow access
and difficult predictable timing results from this behaviour.
The not predictable access time requires DPA_RDY polling at writing due to the RDY line pull down feature
is in general only supported for read access in GDC.
With setting higher Priority for DPA access than GPU (display output) this situation can be improved. This
can help when high bandwidth components are running continuously, i.e. GPU, PP and VIC. The risk of
interrupting the real-time streams of GPU and VIC increases only negligible, but beware of changing de-
fault priority when working at the upper limit of bandwidth consumption.
• Indirect Physical Access (IPA)
Commands: PutPA, GetPA
IPA makes full benefit of physical access while using burst transfer techniques. Additional no restrictions
apply with address range limitation. Physical address is transferred to the Input FIFO. Data packets are also
routed through Input or Output FIFOs. To achieve maximum data throughput physical address auto-incre-
ment is implemented for GetPA function.
If logical pixel data is transferred via physical access, be aware of physical address incrementing method.
Due to the fact that single transfers with converted addresses (logical to physical) are not effective over this
device, the user should check if block based transfers are possible. Pixel data have to be divided into seg-
ments even to 8 data words in X-dimension and then next line of block can be transferred. Burst transfer
should start aligned on the block grid (8x32 words). With this method only one start address has to be con-
verted and sent followed by a data block transfer of up to 256 words is possible. Another way is the transfer
of 8-words line segments with a start address with only moderate amount of address overhead. This has the
advantage that there is no need for restricting pixel position to the block grid in Y-dimension.
Problematic in any case is random access on pixels over physical addresses. Command and address calcu-
lation effort is too high. Dedicated Pixel commands should be used then.
If packetized block transfer is used, priority of IPA device has not that much influence on data rate com-
pared to DPA. But increasing of IPA priority may cause interruption of real-time processes of VIC and
GPU. Only two devices with highest priority setting are kept as real-time due to the arbitration scheme.
Important parameters for IPA are Input and Output FIFO data amount MIN/MAX thresholds
(DIPAIF_IFMAX, DIPAIF_IFMIN, DIPAOF_OFMAX, DIPAOF_OFMIN). This thresholds control when
a transfer is started/stopped (max) and adjust block size of memory transfers (min). Higher block size im-
proves performance but increases risk of data stream interruption for other devices.
1.5.1.3 Program Example
Following example demonstrates address mapping and physical access with relationship to pixel coordi-
nates. Intention is to draw a rectangular area with radiancies and finally copy the drawn object per physical
access.
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