MB87P2020 Datasheet, PDF (283/356 Pages) Fujitsu Component Limited. – Colour LCD/CRT/TV Controller

AC Characteristics
Table 2-15: Analog Display Interface, Output Characteristics
Parameter
Symbol
@20pF [ps]
@50pF [ps]
Jas
Lav
Jas
Lav
max. Disp. Analog Output Delay Time (r)^{a t}ODDISA
14200 14430 13350 13580
min. Display Analog Output Hold Time
t_OHDISA
8410 9080 6250 6910
a. Related to DIS_PIXCLK output pin. The capacitive influence on the pixel clock output is greater than the
influence on the analog outputs. Due to subtracted clock delay the relative delay values are smaller in the
50pF column.
2.5.8 Video Input
For a functional timing description of video input signals and for a description of supported video modes
see Video Interface Controller (VIC) description. This specification describes only the physical timing of
video input signals.
Table 2-16: Video Input Timing
Parameter
Video Data (VSC_D) Setup Time
Video Data (VSC_D) Hold Time
VSC_VREF Setup Time
VSC_VREF Hold Time
VSC_VACT Setup
VSC_VACT Hold
VSC_ALPHA Setup
VSC_ALPHA Hold
VSC_IDENT Setup
VSC_IDENT Hold
Symbol
t_SVID
t_HVID
t_SVIVREF
t_HVIVREF
t_SVIVACT
t_HVIVACT
t_SVIALPHA
t_HVIALPHA
t_SVIIDENTI
t_HVIIDENTI
Min [ps]
Jas
Lav
-360 -1660
2360 2800
-1940 -1580
2660 2450
-2100 -1610
2820 2510
-2100 -1590
2840 2540
-2100 -1620
2850 2540
Max [ps]
Jas
Lav
-
-
-
-
-
-
-
-
-
-
2.5.9 CCFL FET Driver
For pulse shape and functional timing of CCFL FET driver see CCFL Description. This information is for
capacitance influence on operating conditions and skew estimation only.
Table 2-17: CCFL Driver Outputs, Output Characteristics
Parameter
max. CCFL_FET1 Output Delay Time^a
Symbol
t_ODCCFET1
@20pF [ps]
Jas
Lav
8460 5310
@50pF [ps]
Jas
Lav
10490 7340
min. CCFL_FET1 Output Hold Time
max. CCFL_FET2 Output Delay Time
t_OHCCFET1
t_ODCCFET2
3040
8370
1830
5270
3670
10420
2460
7290
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