MB87P2020 Datasheet, PDF (296/356 Pages) Fujitsu Component Limited. – Colour LCD/CRT/TV Controller

MB87J2120, MB87P2020-A Hardware Manual
Table 1-2: Register address space for Jasmine and Lavender
Register
Bits Group
Name Address
Name
Description
Default
value
CMDDEB
0x009C
SDSEQRAM
[32]
(Jas-
mine)
0x0100-
0x017C
(Jas-
mine)
SDSEQRAM
[64]
(Laven-
der)
0x0100-
0x01FC
(Laven-
der)
SDMODE
0x0200
SDINIT
0x0204
SDRFSH
0x0208
31:8
7:0
12:7
11:7
6:4
3
2
1
9
6:4
3
2:0
15:0
15:0
Command debug register
(read only)
PAR
o R Parameter for currently exe-
cuted command
CMD
o R Code for currently executed
command
SDC (SDRAM Controller)
SDRAM sequencer RAM
(32 words)
ADDR
o
o
Microcode sequencer address
argument
INST
oo
Microcode instruction:
run, ret, call, loop, srw, rrw,
pde, pdx - coded 0 to 7)
RAS
oo
Container command for
SDRAM (RAS)
CAS
oo
Container command for
SDRAM (CAS)
WE
oo
Container command for
SDRAM (WE)
SDRAM Mode Register
(external SDRAM MRS reg-
ister; Lavender only),
Bit [12:10, 8:7] reserved, set
to ’0’
BRST
o
Write enable
0: Burst
1: Single
CL
o
CAS latency (2/3)
ILB
o
1: Interleave burst
0: Sequential burst
BLEN
o
Burst length (0=1, 1=2, 2=4,
3=8, 7=full)
IP
oo
Sysclocks of SDRAM power
up initialization period (200
us)
RP
oo
Sysclocks of SDRAM row
refresh period (16 us)
0x000000
0xFF
undef
undef
undef
undef
undef
0
0x3
0
0x3
0x4E20
0x0640
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