MB87P2020 Datasheet, PDF (62/356 Pages) Fujitsu Component Limited. – Colour LCD/CRT/TV Controller

MB87J2120, MB87P2020-A Hardware Manual
MCU
MCU
Interrupt
mask (INTNOM)
D
MCU Address
flag_set(HW)
flag_reset(HW)
1
0
Flagregister
(FLNOM)
S
1
R
0
INTLVL
flag0
........
flag31
FLAGRES
Figure 1-12: Interrupt generation within interrupt controller for one flag
Interrupt edge
generation
(Jasmine only)
INTREQ INTC
Interrupt
A flag set by hardware is always possible; the hardware reset can be switched off in order to avoid dynamic
flag changing. This flag behaviour is referred to as ’static’ flag behaviour. A forbidden hardware reset is
important for a handshake implementation between display controller and MCU for instance in connection
with interrupts.
If flag set and reset is allowed the flag behaviour is called ’dynamic’ behaviour. In this case the desired flag
simply follows the input signal. Note that flag changes may occur with core or display clock which may be
higher than ULB bus clock¹. Therefore it is not possible to trace some hardware events because you can not
achieve a suitable sample rate. If the toggle rate for a real hardware flag is slow enough you can of course
set the flag behaviour to dynamic.
Many flags represent a state which can be manipulated by software so that dynamic behaviour makes sense
for these flags because they can be indirectly influenced by software. For instance the full flag for input
FIFO can only change its value after writing data to input FIFO.
The flag behaviour can be set with register FLAGRES. Flag hardware reset can be turned on (1: dynamic
flag behaviour) or off (0: static flag behaviour) for each flag separately.
1.6.3 Interrupt generation
The first operation for interrupt generation is the masking of Flagregister by Interrupt-Mask-Register. With
this mechanism an application can determine which flags can cause an interrupt by simply set (’1’) at the
same bitposition as the flag in Interrupt-Mask-Register. Every flag can be source for an interrupt because
an OR combination of flags is implemented in Interrupt Controller.
After the Flagregister a level detection circuit is implemented (see figure 1-12) which detects the rising edge
of a flag. With the INTLVL register the programmer can choose for every flag whether to take the flag itself
(level interrupt) or the edge detection signal with one core clock length (edge interrupt).
In level triggered interrupt mode an interrupt handshake should normally be used between MCU and Lav-
ender/Jasmine. This means that the flag responsible for interrupt will be reset inside interrupt service routine
(ISR). The ISR is only called when MCU detects an interrupt request. As a result the interrupt request is
only taken back from Lavender/Jasmine after flag reset. So it is ensured that the interrupt signal is stable for
many ULB clocks in level triggered mode. Be careful with dynamic flags in this context.
In edge triggered interrupt mode no handshake between MCU and display controller is necessary. The dis-
play controller signals the MCU with a pulse on interrupt request signal (pin ULB_INTRQ) that a certain
event occurred within display controller. The MCU can call its ISR and does not need to reset the flag which
caused the interrupt if the flag behaviour is set to dynamic. If the flag behaviour is set to static and a reset
access from MCU is missing no more interrupts can be generated because no more rising edges for the in-
teresting flag occur.
1. The real sample rate is again lower since it is the time between two bus read cycles.
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