MB87P2020 Datasheet, PDF (23/356 Pages) Fujitsu Component Limited. – Colour LCD/CRT/TV Controller

Graphic Controller Overview
4 Register and Command Overview
4.1 Register Overview
The GDC device is mainly configurable by registers. These configuration registers are mapped in a
64 kByte large address range from 0x0000 to 0xffff. It is possible to shift this register space in steps of
64 kByte by the Mode[1:0] pins in order to connect multiple GDC devices.
Above this 4*64 kByte = 256 kByte address range the SDRAM video memory could be made visible for
direct physical access.
At byte address 0x1f:ffff GDC memory map ends with a total size of 2 MByte.
4.2 Command Overview
The command register width is 32 Bit. It is divided into command code and parameters:
31
7
0
parameters
code
Partial writing (halfword and byte) of command register is supported. Command execution is triggered by
writing byte 3 (code, bits [7:0]). Thus parameters should be written before command code.
Not all commands need parameters. In these cases parameter section is ignored.
In table 4-1 all commands are listed with mnemonic, command code and command parameters (if neces-
sary. This is only a short command overview, a more detailed command list can be found in appendix.
Table 4-1: Command List
Mnemonic Code
Function
Bitmap and Texture Functions
Addressed
device
PutBM
PutCP
PutTxtBM
01H Store bitmap into Video RAM
Pixel Processor
02H Store compressed bitmap into Video RAM
05H
Draw uncompressed texture with fixed foreground
and background colour
PutTxtCP
DwLine
06H
Draw compressed texture with fixed foreground and
background colour
Drawing Functions (2D)
03H
"Draw a line" - calculate pixel position and store
LINECOL into Video RAM
Pixel Processor
DwPoly
0FH
"Draw a polygon" - draws multiple lines between
defined points, see DwLine
DwRect
04H
"Draw an rectangle" - calculate pixel addresses and
store RECTCOL into Video RAM
Pixel Operations
Register and Command Overview
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