MC68HC908LD64 Datasheet, PDF (72/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

FLASH Memory
4.8 FLASH Block Protection
Due to the ability of the on-board charge pump to erase and program the
FLASH memory in the target application, provision is made for protecting
blocks of memory from unintentional erase or program operations due to
system malfunction. This protection is done by use of a FLASH Block
Protect Register for each array (FLBPR and FLBPR1). The block protect
register determines the range of the FLASH memory which is to be
protected. The range of the protected area starts from a location defined
by block protect register and ends at the bottom of the FLASH memory
array ($FFFF and $3FFF). When the memory is protected, the HVEN bit
cannot be set in either ERASE or PROGRAM operations.
4.8.1 FLASH Block Protect Registers
Each FLASH block protect register is implemented as an 7-bit I/O
register. The BPR bit content of the register determines the starting
location of the protected range within the FLASH memory.
This register controls the 47,616-byte array:
Address: $FE08
Bit 7
6
5
4
3
2
1
Bit 0
Read:
0
BPR7 BPR6 BPR5 BPR4 BPR3 BPR2 BPR1
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 4-6. 47,616-byte FLASH Block Protect Register (FLBPR)
This register controls the 13K-byte array:
Address: $FE0B
Bit 7
6
5
4
3
2
1
Bit 0
Read:
0
BPR17 BPR16 BPR15 BPR14 BPR13 BPR12 BPR11
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 4-7. 13K-byte FLASH Block Protect Register 1 (FLBPR1)
Data Sheet
72
FLASH Memory
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor