MC68HC908LD64 Datasheet, PDF (143/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

Monitor ROM (MON)
Functional Description
NEXT
START
START
BIT BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 ^STOP BIT
BIT
Figure 10-2. Monitor Data Format
NEXT
START
START
$A5 _BIT BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 STOP BIT
BIT
START
STOP
BREAK _BIT BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 BIT
Figure 10-3. Sample Monitor Waveforms
The data transmit and receive rate can be anywhere from 4800 baud to
28.8 kbaud. Transmit and receive baud rates must be identical.
10.4.3 Echoing
As shown in Figure 10-4, the monitor ROM immediately echoes each
received byte back to the PTA0 pin for error checking.
SENT TO
MONITOR
READ
READ ADDR. HIGH ADDR. HIGH ADDR. LOW ADDR. LOW DATA
ECHO
RESULT
Figure 10-4. Read Transaction
Any result of a command appears after the echo of the last byte of the
command.
10.4.4 Break Signal
A start bit followed by nine low bits is a break signal (see Figure 10-5).
When the monitor receives a break signal, it drives the PTA0 pin high for
the duration of two bits before echoing the break signal.
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor
Monitor ROM (MON)
Data Sheet
143