MC68HC908LD64 Datasheet, PDF (308/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

Input/Output (I/O) Ports
DDRD[7:0] — Data Direction Register D Bits
These read/write bits control port D data direction. Reset clears
DDRD[7:0], configuring all port D pins as inputs.
1 = Corresponding port D pin configured as output
0 = Corresponding port D pin configured as input
NOTE: Avoid glitches on port D pins by writing to the port D data register before
changing data direction register D bits from 0 to 1.
Figure 19-15 shows the port D I/O logic.
READ DDRD ($0007)
WRITE DDRD ($0007)
RESET
WRITE PTD ($0003)
DDRDx
PTDx
PTDx
READ PTD ($0003)
Data Sheet
308
Figure 19-15. Port D I/O Circuit
When bit DDRDx is a logic 1, reading address $0003 reads the PTDx
data latch. When bit DDRDx is a logic 0, reading address $0003 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 19-5 summarizes
the operation of the port D pins.
Table 19-5. Port D Pin Functions
DDRD
Bit
0
PTD Bit
X⁽¹⁾
I/O Pin
Mode
Input, Hi-Z⁽²⁾
Accesses
to DDRD
Read/Write
DDRD[7:0]
1
X
Output
DDRD[7:0]
Notes:
1. X = don’t care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect the input.
Accesses to PTD
Read
Pin
PTD[7:0]
Write
PTD[7:0]⁽³⁾
PTD[7:0]
Input/Output (I/O) Ports
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor