MC68HC908LD64 Datasheet, PDF (116/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

System Integration Module (SIM)
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Read:
SBSW
$FE00
SIM
Break
Status
Register
(SBSR)
Write:
R
R
R
R
R
R
R
Note
Reset:
0
Read: POR
PIN
COP ILOP ILAD USB
0
0
$FE01
SIM
Reset
Status
Register
(SRSR)
Write:
POR: 1
0
0
0
0
0
0
0
SIM Break Flag Control ^Read: _BCFE
R
R
R
R
R
R
R
$FE03
Register Write:
(SBFCR) _{Reset: 0}
Read: IF6
IF5
IF4
IF3
IF2
IF1
0
0
$FE04
Interrupt
Status
Register 1
(INT1)
Write:
R
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
Interrupt Status Register 2 ^{Read: IF14}
IF13
IF12
IF11
IF10
IF9
IF8
IF7
$FE05
(INT2) Write: R
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
Note: Writing a logic 0 clears SBSW.
= Unimplemented
R = Reserved
Figure 9-2. SIM I/O Register Summary
Table 9-1 shows the internal signal names used in this section.
Table 9-1. Signal Name Conventions
Signal Name
OSCXCLK
OSCOUT
IAB
IDB
PORRST
IRST
R/W
Description
Buffered version of OSC1 from the oscillator
The OSCXCLK frequency divided by two. This signal is again
divided by two in the SIM to generate the internal bus clocks.
(Bus clock = OSCXCLK divided by four)
Internal address bus
Internal data bus
Signal from the power-on reset module to the SIM
Internal reset signal
Read/write signal
Data Sheet
116
System Integration Module (SIM)
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor