MC68HC908LD64 Datasheet, PDF (280/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

On-Screen Display (OSD)
18.7.4 OSD Row Address Register (OSDRAR)
Address: $0064
Bit 7
6
5
4
3
2
1
0
Read:
Write:
ROWA3 ROWA2 ROWA1 ROWA0
Reset:
0
0
0
0
Figure 18-9. OSD Row Address Register (OSDRAR)
ROWA[3:0] — OSD RAM Row Address
These bits define the row address of the OSD RAM. Together with the
column address, the row-column address defines the location in the
OSD screen memory where data is to be transferred from the data
buffers (OSD data registers). Data is transferred when the high byte
data register is written ($0063). Reset clears these bits to zero.
(See 18.6 OSD Screen Memory Map.)
18.7.5 OSD Column Address Register (OSDCAR)
Address: $0065
Bit 7
6
5
4
3
2
1
0
Read:
Write:
COLA4 COLA3 COLA2 COLA1 COLA0
Reset:
0
0
0
0
0
Figure 18-10. OSD Column Address Register (OSDCAR)
COLA[4:0] — OSD RAM Column Address
These bits define the column address of the OSD RAM. Together with
the row address, the row-column address defines the location in the
OSD screen memory where data is to be transferred from the data
buffers (OSD data registers). Data is transferred when the high byte
data register is written ($0063). Reset clears these bits to zero.
(See 18.6 OSD Screen Memory Map.)
Data Sheet
280
On-Screen Display (OSD)
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor