MC68HC908LD64 Datasheet, PDF (67/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

FLASH Memory
FLASH Control Registers
MASS — Mass Erase Control Bit
This read/write bit configures the memory for mass erase operation or
block erase operation when the ERASE bit is set.
1 = Mass Erase operation selected
0 = Mass Erase operation not selected
ERASE — Erase Control Bit
This read/write bit configures the memory for erase operation. ERASE
is interlocked with the PGM bit such that both bits cannot be equal to
1 or set to 1 at the same time.
1 = Erase operation selected
0 = Erase operation not selected
PGM — Program Control Bit
This read/write bit configures the memory for program operation.
PGM is interlocked with the ERASE bit such that both bits cannot be
equal to 1 or set to 1 at the same time.
1 = Program operation selected
0 = Program operation not selected
4.4.1 OSD FLASH Even High Byte Write Buffer (OSDEHBUF)
Address: $0066
Bit 7
6
5
4
3
2
1
0
Read:
DOT15
Write:
DOT14
DOT13
DOT12
DOT11
DOT10
DOT9
DOT8
Reset:
Unaffected by reset
Figure 4-4. OSD FLASH Even High Byte Write Buffer (OSDEHBUF)
DOT[15:8] — OSD FLASH Even High Byte Buffer
These bits define the byte to be programmed to an even address
location of the 13K-bytes array. The contents of this register will be
automatically programmed to the even address ($xxxx) location when
the odd address ($xxxx+1) is programmed. Reset has no effect on these
bits. See 18.5 OSD FLASH Font Memory Map for OSD font memory
map.
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor
FLASH Memory
Data Sheet
67