MC68HC908LD64 Datasheet, PDF (221/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

Data Sheet — MC68HC908LD64
Section 15. Multi-Master IIC Interface (MMIIC)
15.1 Contents
15.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 221
15.3 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222
15.4 I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222
15.5 Multi-Master IIC Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . 223
15.5.1 Multi-Master IIC Address Register (MMADR) . . . . . . . . . . 224
15.5.2 Multi-Master IIC Control Register (MMCR) . . . . . . . . . . . . 225
15.5.3 Multi-Master IIC Master Control Register (MIMCR) . . . . . . 226
15.5.4 Multi-Master IIC Status Register (MMSR) . . . . . . . . . . . . . 228
15.5.5 Multi-Master IIC Data Transmit Register (MMDTR) . . . . . . 230
15.5.6 Multi-Master IIC Data Receive Register (MMDRR) . . . . . . 231
15.6 Programming Considerations . . . . . . . . . . . . . . . . . . . . . . . . . 232
15.2 Introduction
This Multi-master IIC (MMIIC) Interface is designed for internal serial
communication between the MCU and other IIC devices. A hardware
circuit generates "start" and "stop" signal, while byte by byte data
transfer is interrupt driven by the software algorithm. Therefore, it can
greatly help the software in dealing with other devices to have higher
system efficiency in a typical digital monitor system.
This module not only can be applied in internal communications, but can
also be used as a typical command reception serial bus for factory setup
and alignment purposes. It also provides the flexibility of hooking
additional devices to an existing system for future expansion without
adding extra hardware.
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor
Multi-Master IIC Interface (MMIIC)
Data Sheet
221