MC68HC908LD64 Datasheet, PDF (153/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

Timer Interface Module (TIM)
Functional Description
Addr. Register Name
Bit 7
6
5
4
3
2
1
Bit 0
$0014
Read:
TIM Channel 1
Bit15 Bit14 Bit13 Bit12 Bit11 Bit10
Bit9
Bit8
Register High Write:
(TCH1H)
Reset:
Indeterminate after reset
$0015
Read:
TIM Channel 1
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Register Low Write:
(TCH1L)
Reset:
Indeterminate after reset
= Unimplemented
11.5.1 TIM Counter Prescaler
The TIM clock source can be one of the seven prescaler outputs. The
prescaler generates seven clock rates from the internal bus clock. The
prescaler select bits, PS[2:0], in the TIM status and control register
(TSC) select the TIM clock source.
11.5.2 Input Capture
With the input capture function, the TIM can capture the time at which an
external event occurs. When an active edge occurs on the pin of an input
capture channel, the TIM latches the contents of the TIM counter into the
TIM channel registers, TCHxH:TCHxL. The polarity of the active edge is
programmable. Input captures can generate TIM CPU interrupt
requests.
11.5.3 Output Compare
With the output compare function, the TIM can generate a periodic pulse
with a programmable polarity, duration, and frequency. When the
counter reaches the value in the registers of an output compare channel,
the TIM can set, clear, or toggle the channel pin. Output compares can
generate TIM CPU interrupt requests.
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor
Timer Interface Module (TIM)
Data Sheet
153