MC68HC908LD64 Datasheet, PDF (142/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

Monitor ROM (MON)
Monitor mode uses different vectors for reset and SWI. The alternate
vectors are in the $FE page instead of the $FF page and allow code
execution from the internal monitor firmware instead of user code.
When the host computer has completed downloading code into the MCU
RAM, This code can be executed by driving PTA0 low while asserting
RST low and then high. The internal monitor ROM firmware will interpret
the low on PTA0 as an indication to jump to RAM, and execution control
will then continue from RAM. Execution of an SWI from the downloaded
code will return program control to the internal monitor ROM firmware.
Alternatively, the host can send a RUN command, which executes an
RTI, and this can be used to send control to the address on the stack
pointer.
The COP module is disabled in monitor mode as long as V_TST is applied
to the IRQ or the RST pin. (See Section 9. System Integration Module
(SIM) for more information on modes of operation.)
Table 10-2 is a summary of the differences between user mode and
monitor mode.
Table 10-2. Mode Differences
Functions
Modes
COP
Reset
Vector
High
Reset
Vector
Low
SWI
Vector
High
SWI
Vector
Low
User
Enabled
$FFFE
$FFFF
$FFFC
$FFFD
Monitor
Disabled ⁽¹⁾
$FEFE
$FEFF
$FEFC
$FEFD
Notes:
1. If the high voltage (V_TST) is removed from the IRQ pin, the SIM asserts its COP enable
output. The COP is an option enabled or disabled by the COPD bit in the configuration
register.
10.4.2 Data Format
Communication with the monitor ROM is in standard non-return-to-zero
(NRZ) mark/space data format. (See Figure 10-2 and Figure 10-3.)
Data Sheet
142
Monitor ROM (MON)
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor