MC68HC908LD64 Datasheet, PDF (347/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

Electrical Specifications
Control Timing
24.7 Control Timing
Table 24-5. Control Timing
Characteristic⁽¹⁾
Symbol
Min
Max
Unit
Internal operating frequency⁽²⁾
RST input pulse width low⁽³⁾
f_OP
—
t_IRL
50
6
MHz
—
ns
Notes:
1. V_DD = 3.0 to 3.6 Vdc, V_SS = 0 Vdc; timing shown with respect to 20% V_DD and 70% V_DD, unless otherwise noted.
2. Some modules may require a minimum frequency greater than dc for proper operation;
see appropriate table for this information.
3. Minimum pulse width reset is guaranteed to be recognized. It is possible for a smaller pulse width to cause a reset.
24.8 TImer Interface Module Characteristics
Table 24-6. TIM Characteristics
Characteristic
Input capture pulse width
Input clock pulse width
Symbol
t_TIH, t_TIL
t_TCH, t_TCL
Min
125
(1/f_OP) + 5
Max
Unit
—
ns
—
ns
24.9 Oscillator Characteristics
Table 24-7. Oscillator Characteristics
Characteristic
Symbol
Min
Typ
Crystal frequency⁽¹⁾
f_OSCXCLK
—
24
External clock
Reference frequency^{(1), (2)}
f_OSCXCLK
dc
24
Crystal fixed capacitance⁽³⁾
C₁
—
15
Crystal tuning capacitance⁽³⁾
C₂
—
15
Feedback bias resistor
R_B
—
2
Series resistor⁽³⁾
R_S
—
0
Notes:
1. The sync processor module is designed to function at f_OSCXCLK = 24MHz.
2. No more than 10% duty cycle deviation from 50%
3. Not Required for high frequency crystals
Max
—
—
—
—
—
—
Unit
MHz
MHz
pF
pF
MΩ
Ω
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor
Electrical Specifications
Data Sheet
347