MC68HC908LD64 Datasheet, PDF (285/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

On-Screen Display (OSD)
OSD Registers
W_SHD — Shadow on Window
Set this bit to activate the window shadowing. When the window is
active, the right M pixels and lower N horizontal scan lines will output
shadowing. The M, N, and color of window shadow is defined in the
frame control registers located at row 15, column 16, 17, 18, and 19.
See 18.8.3.5 Frame Control Registers for details.
1 = Background window shadow enabled
0 = Background window shadow disabled
Column start address
Column end address
WINDOW AREA
Row start address
N
M and N are defined in the
frame control registers located
at row 15, column 16 and 17.
Row end address
M
N
SHADOW
M
R, G, B — Background Window Color
These bits define the color of the background window.
18.8.3.2 Vertical Delay Control Register
Row 15, Column 12:
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
VERTD
MSB
LSB
VERTD —þVertical Delay
These bits define the vertical starting position. The 8-bit gives 256
steps, with each step increment of four horizontal lines for each field.
Its value cannot be zero at anytime. In order to avoid screen
misalignment, the value of VERTD is decided by the last OSD line not
over the next leading edge of PVSYNC.
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor
On-Screen Display (OSD)
Data Sheet
285