MC68HC908LD64 Datasheet, PDF (39/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

General Description
Pin Functions
NOTE:
Table 1-1. Pin Functions (Continued)
PIN NAME
PTD3/HOUT
PTD2/VOUT
PTD1/DE
PTD0/DCLK
CLAMP/TCH0
PVSYNC
PHSYNC
PCLK
OSDR
OSDG
OSDB
FBKG
PTE7/DMINUS4
PTE6/DPLUS4
PTE5/DMINUS3
PTE4/4DPLUS3
PTE3/DMINUS2
PTE2/DPLUS2
PTE1/DMINUS1
PTE0/DPLUS1
DPLUS0
DMINUS0
PIN DESCRIPTION
These are shared function, bidirectional I/O port
pins. These pins can be configured as standard
I/O pins or free-run timing output signals.
See Section 19. Input/Output (I/O) Ports and
Section 17. Sync Processor.
This is shared function pins. This TIM channel 0
I/O pin can be configured as the Sync processor
CLAMP output pin.
See Section 11. Timer Interface Module (TIM)
and Section 17. Sync Processor.
Vsync input to the On-Screen Display module.
This pin is rated at +5V.
See Section 18. On-Screen Display (OSD).
Hsync input to the On-Screen Display module.
This pin is rated at +5V.
See Section 18. On-Screen Display (OSD).
Pixel clock input to the On-Screen Display module.
This pin is rated at +5V.
See Section 18. On-Screen Display (OSD).
R, G, and B output of the On-Screen Display
module.
See Section 18. On-Screen Display (OSD).
Pixel-enable output of the On-Screen Display
module.
See Section 18. On-Screen Display (OSD).
These are shared function, bidirectional I/O port
pins. These pins can be configured as standard
I/O pins or downstream data pins of USB module.
See Section 19. Input/Output (I/O) Ports and
Section 14. Universal Serial Bus Module (USB).
Data pins of USB module upstream port.
See Section 14. Universal Serial Bus Module
(USB).
Any unused inputs and I/O ports should be tied to an appropriate logic level
(either V_DD or V_SS). Although the I/O ports of the MC68HC908LD64 do not
require termination, termination is recommended to reduce the possibility of
static damage.
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor
General Description
Data Sheet
39