MC68HC908LD64 Datasheet, PDF (48/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory Map
Addr. Register Name
Bit 7
IRQ Status and Control ^{Read: 0}
$001E
Register Write:
(INTSCR) _{Reset: 0}
Read: 0
$001F
Configuration Register
(CONFIG)^†
Write:
Reset: 0
† One-time writable register after each reset.
$0020
USB Embedded Device ^{Read: DE0R07}
Endpoint 0 Data Reg. 0 Write: DE0T07
(DE0D0) _Reset:
$0021
USB Embedded Device ^{Read: DE0R17}
Endpoint 0 Data Reg. 1 Write: DE0T17
(DE0D1) _Reset:
$0022
USB Embedded Device ^{Read: DE0R27}
Endpoint 0 Data Reg. 2 Write: DE0T27
(DE0D2) _Reset:
$0023
USB Embedded Device ^{Read: DE0R37}
Endpoint 0 Data Reg. 3 Write: DE0T37
(DE0D3) _Reset:
$0024
USB Embedded Device ^{Read: DE0R47}
Endpoint 0 Data Reg. 4 Write: DE0T47
(DE0D4) _Reset:
$0025
USB Embedded Device ^{Read: DE0R57}
Endpoint 0 Data Reg. 5 Write: DE0T57
(DE0D5) _Reset:
$0026
USB Embedded Device ^{Read: DE0R67}
Endpoint 0 Data Reg. 6 Write: DE0T67
(DE0D6) _Reset:
$0027
USB Embedded Device ^{Read: DE0R77}
Endpoint 0 Data Reg. 7 Write: DE0T77
(DE0D7) _Reset:
6
0
0
0
0
DE0R06
DE0T06
DE0R16
DE0T16
DE0R26
DE0T26
DE0R36
DE0T36
DE0R46
DE0T46
DE0R56
DE0T56
DE0R66
DE0T66
DE0R76
DE0T76
5
4
3
2
0
0
IRQF
0
ACK
0
0
0
0
0
0
SSREC COPRS
0
0
0
0
DE0R05 DE0R04 DE0R03 DE0R02
DE0T05 DE0T04 DE0T03 DE0T02
Indeterminate after reset
DE0R15 DE0R14 DE0R13 DE0R12
DE0T15 DE0T14 DE0T13 DE0T12
Indeterminate after reset
DE0R25 DE0R24 DE0R23 DE0R22
DE0T25 DE0T24 DE0T23 DE0T22
Indeterminate after reset
DE0R35 DE0R34 DE0R33 DE0R32
DE0T35 DE0T34 DE0T33 DE0T32
Indeterminate after reset
DE0R45 DE0R44 DE0R43 DE0R42
DE0T45 DE0T44 DE0T43 DE0T42
Indeterminate after reset
DE0R55 DE0R54 DE0R53 DE0R52
DE0T55 DE0T54 DE0T53 DE0T52
Indeterminate after reset
DE0R65 DE0R64 DE0R63 DE0R62
DE0T65 DE0T64 DE0T63 DE0T62
Indeterminate after reset
DE0R75 DE0R74 DE0R73 DE0R72
DE0T75 DE0T74 DE0T73 DE0T72
Indeterminate after reset
1
IMASK
0
STOP
0
DE0R01
DE0T01
DE0R11
DE0T11
DE0R21
DE0T21
DE0R31
DE0T31
DE0R41
DE0T41
DE0R51
DE0T51
DE0R61
DE0T61
DE0R71
DE0T71
Bit 0
MODE
0
COPD
0
DE0R00
DE0T00
DE0R10
DE0T10
DE0R20
DE0T20
DE0R30
DE0T30
DE0R40
DE0T40
DE0R50
DE0T50
DE0R60
DE0T60
DE0R70
DE0T70
U = Unaffected
X = Indeterminate
= Unimplemented
R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 4 of 15)
Data Sheet
48
Memory Map
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor