MC68HC908LD64 Datasheet, PDF (134/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

System Integration Module (SIM)
9.8 SIM Registers
The SIM has three memory mapped registers. Table 9-4 shows the
mapping of these registers.
Table 9-4. SIM Registers Summary
Address
$FE00
$FE01
$FE03
Register
SBSR
SRSR
SBFCR
Access Mode
User
User
User
9.8.1 SIM Break Status Register (SBSR)
The SIM break status register contains a flag to indicate that a break
caused an exit from stop or wait mode.
Address: $FE00
Bit 7
6
5
4
3
2
1
Bit 0
Read:
SBSW
R
R
R
R
R
R
R
Write:
Note
Reset:
0
Note: Writing a logic 0 clears SBSW.
R = Reserved
Figure 9-19. SIM Break Status Register (SBSR)
SBSW — SIM Break Stop/Wait Bit
This status bit is useful in applications requiring a return to wait or stop
mode after exiting from a break interrupt. Clear SBSW by writing a
logic 0 to it. Reset clears SBSW.
1 = Stop mode or wait mode was exited by break interrupt
0 = Stop mode or wait mode was not exited by break interrupt
SBSW can be read within the break interrupt routine. The user can
modify the return address on the stack by subtracting one from it. The
following code is an example.
Data Sheet
134
System Integration Module (SIM)
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor