MC68HC908LD64 Datasheet, PDF (70/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

FLASH Memory
4.7 FLASH Program Operation
NOTE:
NOTE:
Programming of the FLASH memory is done on a row basis. A row
consists of 64 consecutive bytes starting from addresses $XX00,
$XX40, $XX80, and $XXC0. Use this step-by-step procedure to program
a row of FLASH memory (Figure 4-5 is a flowchart representation):
In order to avoid program disturbs, the row must be erased before any
byte on that row is programmed.
1. Set the PGM bit. This configures the memory for program
operation and enables the latching of address and data for
programming.
2. Write any data to any FLASH address within the row address
range desired.
3. Wait for a time, t_nvs (min. 5µs).
4. Set the HVEN bit.
5. Wait for a time, t_pgs (min. 10µs).
6. For 47,616-byte array: Write data to the FLASH address to be
programmed.
For 13K-byte array: Write even address data to OSDEHBUF
then write odd address data to the odd
FLASH address to be programmed.
7. Wait for time, t_PROG (min. 20µs).
8. Repeat step 6 and 7 until all the bytes within the row are
programmed.
9. Clear the PGM bit.
10. Wait for time, t_nvh (min. 5µs).
11. Clear the HVEN bit.
12. After time, t_rcv (min 1µs), the memory can be accessed in read
mode again.
This program sequence is repeated throughout the memory until all data
is programmed.
Programming and erasing of FLASH locations cannot be performed by
code being executed from the same FLASH array that is being
programmed or erased. While these operations must be performed in
the order shown, other unrelated operations may occur between the
steps. Do not exceed t_PROG maximum. See 24.14 FLASH Memory
Characteristics.
Data Sheet
70
FLASH Memory
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor