MC68HC908LD64 Datasheet, PDF (252/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

Sync Processor
17.2 Introduction
The Sync Processor is designed to detect and process sync signals
inside a digital monitor system — from separated Hsync and Vsync
inputs. After detection and the necessary polarity correction and/or sync
separation, the corrected sync signals are sent out. The MCU can also
send commands to other monitor circuitry, such as for the geometry
correction and OSD, using the DDC12AB and/or the IIC communication
channels.
The block diagram of the Sync Processor is shown in Figure 17-2.
NOTE: All quoted timings in this section assume an internal bus frequency of
6 MHz.
17.3 Features
Features of the Sync Processor include the following:
• Polarity detector
• Horizontal frequency counter
• Vertical frequency counter
• Low vertical frequency indicator (40.7Hz)
• Polarity controlled HOUT and VOUT outputs:
– From separate Hsync and Vsync
– From composite sync on HSYNC input pin
– From internal selectable free running Hsync and Vsync pulses
• Free-running Hsync, Vsync, DE, and DCLK of 4 video modes
• CLAMP pulse output to the external pre-amp chip
• Internal schmitt trigger on HSYNC, and VSYNC input pins to
improve noise immunity
Data Sheet
252
Sync Processor
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor