MC68HC908LD64 Datasheet, PDF (288/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

On-Screen Display (OSD)
18.8.3.5 Frame Control Registers
Row 15, Column 15:
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
OSD_EN
VPOL HPOL
OSD_EN — OSD Enable
Set this bit to enable the OSD module output pins, OSDR, OSDG,
OSDB, and FBKG. When OSD_EN is clear, all OSD output pins are
high impedance. This bit is cleared after a POR, reset, or when
OSDRST bit (bit-5 in OSD control register) is set.
1 = OSD output pins: OSDR, OSDG, OSDB, FBKG enabled
0 = OSD output pins held at high impedance
HPOL — Horizontal Sync Polarity
This bit selects the polarity of the incoming horizontal sync signal on
PHSYNC pin. If sync signal is negative polarity, clear this bit. If sync
signal is positive polarity, set this bit. This bit is cleared after a POR,
reset, or when OSDRST bit is set.
1 = Set for positive horizontal sync signal
0 = Clear for negative horizontal sync
VPOL — Vertical Sync Polarity
This bit selects the polarity of the incoming vertical sync signal on
PVSYNC pin. If sync signal is negative polarity, clear this bit. If sync
signal is positive polarity, set this bit. This bit is cleared after a POR,
reset, or when OSDRST bit is set.
1 = Set for positive vertical sync signal
0 = Clear for negative vertical sync
Data Sheet
288
On-Screen Display (OSD)
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor