MC68HC908LD64 Datasheet, PDF (354/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

Electrical Specifications
24.13 DDC12AB/MMIIC Timing
SDA
SCL
t_HD.STA
t_LOW
t_HIGH
t_SU.DAT
t_HD.DAT
t_SU.STA
t_SU.STO
Figure 24-1. MMIIC Signal Timings
24.13.1 DDC12AB/MMIIC Interface Input Signal Timing
Table 24-15. DDC12AB/MMIIC Interface Input Signal Timing
Characteristic⁽¹⁾
Symbol
Min
Max
Unit
START condition hold time
t_HD.STA
2
—
t_CYC
Clock low period
t_LOW
4
—
t_CYC
Clock high period
t_HIGH
4
—
t_CYC
Data set-up time
t_SU.DAT
250
—
ns
Data hold time
t_HD.DAT
0
—
ns
START condition set-up time
(for repeated START condition only)
t_SU.STA
2
—
t_CYC
STOP condition set-up time
t_SU.STO
2
—
t_CYC
Notes:
1. V_DD = 3.0 to 3.6 Vdc, V_SS = 0 Vdc; timing shown with respect to 20% V_DD and 70% V_DD, unless otherwise noted.
24.13.2 DDC12AB/MMIIC Interface Output Signal Timing
Table 24-16. DDC12AB/MMIIC Interface Output Signal Timing
Characteristic⁽¹⁾
Symbol
Min
Max
Unit
SDA/SCL rise time⁽²⁾
t_R
—
1
µs
SDA/SCL fall time
t_F
—
300
ns
Data set-up time
t_SU.DAT
t_LOW
—
ns
Data hold time
t_HD.DAT
0
—
ns
Notes:
1. V_DD = 3.0 to 3.6 Vdc, V_SS = 0 Vdc; timing shown with respect to 20% V_DD and 70% V_DD, unless otherwise noted.
2. With 200pF loading on the SDA/SCL pins.
Data Sheet
354
Electrical Specifications
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor