MC68HC908LD64 Datasheet, PDF (183/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

Analog-to-Digital Converter (ADC)
I/O Registers
13.8 I/O Registers
Three I/O registers control and monitor ADC operation:
• ADC status and control register (ADSCR)
• ADC data register (ADR)
• ADC input clock register (ADICLK)
13.8.1 ADC Status and Control Register
Function of the ADC status and control register is described here.
Address: $003B
Bit 7
6
5
4
3
2
1
Bit 0
Read: COCO
AIEN ADCO ADCH4 ADCH3 ADCH2 ADCH1 ADCH0
Write:
Reset: 0
0
0
1
1
1
1
1
= Unimplemented
Figure 13-3. ADC Status and Control Register (ADSCR)
COCO — Conversions Complete Bit
When the AIEN bit is a logic 0, the COCO is a read-only bit which is
set each time a conversion is completed. This bit is cleared whenever
the ADC status and control register is written, or whenever the ADC
data register is read. Reset clears this bit.
When the AIEN bit is a logic 1 (CPU interrupt enabled), the COCO is
a read-only bit, and will always be logic 0 when read.
1 = conversion completed (AIEN = 0)
0 = conversion not completed (AIEN = 0)
AIEN — ADC Interrupt Enable Bit
When this bit is set, an interrupt is generated at the end of an ADC
conversion. The interrupt signal is cleared when the data register is
read or the status and control register is written. Reset clears the
AIEN bit.
1 = ADC interrupt enabled
0 = ADC interrupt disabled
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor
Analog-to-Digital Converter (ADC)
Data Sheet
183