MC68HC908LD64 Datasheet, PDF (313/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

Input/Output (I/O) Ports
Port E
When bit DDREx is a logic 1, reading address $0008 reads the PTEx
data latch. When bit DDREx is a logic 0, reading address $0008 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 19-6 summarizes
the operation of the port E pins.
Table 19-6. Port E Pin Functions
DDRE
Bit
0
PTE Bit
X⁽¹⁾
I/O Pin
Mode
Input, Hi-Z⁽²⁾
Accesses
to DDRE
Read/Write
DDRE[7:0]
1
X
Output
DDRE[7:0]
Notes:
1. X = don’t care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect the input.
Accesses to PTD
Read
Pin
PTE[7:0]
Write
PTE[7:0]⁽³⁾
PTE[7:0]
19.7.3 Port E Options
The Port E control register (PECR) selects the port E pins for USB
module function or as standard I/O function.
Address: $0068
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Write:
R USBDS4E USBDS3E USBDS2E USBDS1E
Reset:
0
0
0
0
= Unimplemented
Figure 19-20. Port E Control Register (PECR)
USBDS4E–USBDS1E — USB HUB Data Pins Enable
Setting a USBDSxE bit to logic 1 configures the corresponding
PTE/DPLUSx and PTE/DMINUSx pins for USB HUB downstream
port function. Reset clears the USBDSxE bits.
1 = PTE/DPLUSx and PTE/DMINUSx pins configured as USB pins
0 = PTE/DPLUSx and PTE/DMINUSx pins configured as standard
I/O pins
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor
Input/Output (I/O) Ports
Data Sheet
313