MC68HC908LD64 Datasheet, PDF (100/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

Clock Generator Module (CGM)
8.2 Introduction
This section describes the clock generator module (CGM). Using the
crystal reference clock from the oscillator module, the CGM generates
the display base clock, DCLK1, for the sync processor module. The
CGM is able to generate a frequency up to 108MHz from a 24MHz
reference clock.
8.3 Features
Features of the CGM include the following:
• Phase-locked loop with output frequency in integer multiples of the
crystal reference
• Programmable hardware voltage-controlled oscillator (VCO) for
low-jitter operation
• Automatic bandwidth control mode for low-jitter operation
• Automatic frequency lock detector
• CPU interrupt on entry or exit from locked condition
8.4 Functional Description
The CGM consists of three major sub-modules:
• Crystal oscillator circuit which generates the buffered constant
crystal frequency clock, OSCRCLK. (See Section 7. Oscillator
(OSC).)
• Phase-locked loop (PLL) which generates the programmable
VCO frequency clock CGMVCLK.
• Base clock selector circuit; this software-controlled circuit selects
either OSCXCLK divided by two or the VCO clock CGMVCLK
divided by two, as the base clock DCLK1. The sync processor
derives other display clocks from DCLK1.
Data Sheet
100
Clock Generator Module (CGM)
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor