MC68HC908LD64 Datasheet, PDF (309/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

Input/Output (I/O) Ports
Port D
19.6.3 Port D Options
The port D control register (PDCR) selects the port D pins for module
function or as standard I/O function.
Address: $0069
Bit 7
6
5
4
3
2
1
Read:
IICDATE IICSCLE DDCDATE DDCSCLE HOUTE VOUTE DEE
Write:
Reset: 0
0
0
0
0
0
0
Figure 19-16. Port D Control Register (PDCR)
Bit 0
DCLKE
0
IICDATE — MMIIC Data Pin Enable
This bit is set to configure the PTD7/IICSDA pin for IICSDA function.
Reset clears this bit.
1 = PTD7/IICSDA pin configured as IICSDA pin
0 = PTD7/IICSDA pin configured as standard I/O pin
IICSCLE — MMIIC Clock Pin Enable
This bit is set to configure the PTD6/IICSCL pin for IICSCL function.
Reset clears this bit.
1 = PTD6/IICSCL pin configured as IICSCL pin
0 = PTD6/IICSCL pin configured as standard I/O pin
DDCDATE — DDC Data Pin Enable
This bit is set to configure the PTD5/DDCSDA pin for DDCSDA
function. Reset clears this bit.
1 = PTD5/DDCSDA pin configured as DDCSDA pin
0 = PTD5/DDCSDA pin configured as standard I/O port
DDCSCLE — DDC Clock Pin Enable
This bit is set to configure the PTD4/DDCSCL pin for DDCSCL
function. Reset clears this bit.
1 = PTD4/DDCSCL pin configured as DDCSCL pin
0 = PTD4/DDCSCL pin configured as standard I/O port
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor
Input/Output (I/O) Ports
Data Sheet
309