MC68HC908LD64 Datasheet, PDF (353/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

Electrical Specifications
USB DC Electrical Characteristics
24.12.4 USB Signaling Levels
Table 24-14. USB Signaling Levels
Bus State
Signaling Levels
From Originating Driver
At Receiver
Differential “1”
Differential “0”
Data J State:
Low Speed
Full Speed
(D+) – (D–) > 200 mV and D+ or D– > V_SE (min.)
(D+) – (D–) < –200 mV and D+ or D– > V_SE (min.)
Differential “0”
Differential “1”
Data K State:
Low Speed
Full Speed
Differential “1”
Differential “0”
Idle State:
Low Speed
Full Speed
Resume State:
Low Speed
Full Speed
Start of Packet (SOP)
Differential “0” and D– > V_SE (max.) and D+ < V_SE (min.)
Differential “1” and D+ > V_SE (max.) and D– < V_SE (min.)
Differential “1” and D+ > V_SE (max.) and D– < V_SE (min.)
Differential “0” and D– > V_SE (max.) and D+ < V_SE (min.)
Data lines switch from Idle to K State
End of Packet (EOP)
D+ and D– < V_SE (min) for 2 bit
times⁽¹⁾ followed by an Idle for 1 bit
time
D+ and D– < V_SE(min) for ≥ 1 bit
time⁽²⁾ followed by a J State
Disconnect
(Upstream only)
—
D+ and D– < V_SE(max) for ≥ 2.5 µs
Connect
(Upstream only)
—
D+ or D– > V_SE(max) for ≥ 2.5 µs
Reset
(Downstream only)
D+ and D– < V_SE for ≥10 ms
D+ and D– < V_SE (min) for ≥ 2.5 µs
(must be recognized within 5.5
µs)⁽³⁾
Notes:
1. The width of EOP is defined in bit times relative to the speed of transmission.
2. The width of EOP is defined in bit times relative to the device type receiving the EOP.
3. These times apply to an active device that is not in the suspend state.
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor
Electrical Specifications
Data Sheet
353