MC68HC908LD64 Datasheet, PDF (215/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

Universal Serial Bus Module (USB)
Embedded Device Function I/O Registers
14.7.5 USB Embedded Device Control Register 1 (DCR1)
Address: $004C
Bit 7
6
5
4
3
2
1
Bit 0
Read:
T1SEQ ENDADD TX1E
Write:
0
TP1SIZ3 TP1SIZ2 TP1SIZ1 TP1SIZ0
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 14-17. USB Embedded Device Control Register 1 (DCR1)
T1SEQ — Embedded Device Endpoint 1/2 Transmit Sequence Bit
This read/write bit determines which type of data packet (DATA0 or
DATA1) will be sent during the next IN transaction directed to
embedded device endpoint 1 or 2. Toggling of this bit must be
controlled by software. Reset clears this bit.
1 = DATA1 token active for next embedded device endpoint 1/2
transmit
0 = DATA0 token active for next embedded device endpoint 1/2
transmit
ENDADD — Endpoint Address Select
This read/write bit specifies whether the data inside the
DE1D0–DE1D7 registers are used for embedded device endpoint 1
or 2. If all the conditions for a successful endpoint 2 USB response to
a host’s IN token are satisfied (TXD1F=0, TX1E=1, DSTALL2=0, and
ENABLE2=1) except that the ENDADD bit is configured for
endpoint 1, the USB responds with a NAK handshake packet. Reset
clears this bit.
1 = The data buffers are used for embedded device endpoint 2
0 = The data buffers are used for embedded device endpoint 1
TX1E — Embedded Device Endpoint 1/2 Transmit Enable
This read/write bit enables a transmit to occur when the USB Host
controller sends an IN token to endpoint 1 or endpoint 2 of the
embedded device. The appropriate endpoint enable bit, ENABLE1 or
ENABLE2 bit in the DCR2 register, should also be set. Software
should set the TX1E bit when data is ready to be transmitted.
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor
Universal Serial Bus Module (USB)
Data Sheet
215