MC68HC908LD64 Datasheet, PDF (233/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

Multi-Master IIC Interface (MMIIC)
Programming Considerations
(a) Master Transmit Mode
START
Address 0 ACK
TX Data1
ACK
TX DataN
NAK STOP
MMTXBE=0
MMRW=0
MMAST=1
Data1 → MMDTR
MMTXBE=1
MMTXIF=1
Data2 → MMDTR
MMTXBE=1
MMTXIF=1
Data3 → MMDTR
MMTXBE=1 MMNAKIF=1
MMTXIF=1 MMAST=0
DataN+2 → MMDTR MMTXBE=0
(b) Master Receive Mode
START
Address 1 ACK
RX Data1
ACK
RX DataN
NAK STOP
MMRXBF=0
MMRW=1
MMAST=1
MMTXBE=0
(dummy data → MMDTR)
Data1 → MMDRR
MMRXIF=1
MMRXBF=1
(c) Slave Transmit Mode
START
Address 1 ACK
TX Data1
ACK
DataN → MMDRR MMNAKIF=1
MMRXIF=1 ^MMAST=0
MMRXBF=1
TX DataN
NAK STOP
MMTXBE=1
MMRXBF=0
MMRXIF=1
MMRXBF=1
MMATCH=1
MMSRW=1
Data1 → MMDTR
MMTXBE=1
MMTXIF=1
Data2 → MMDTR
(d) Slave Receive Mode
START
Address 0 ACK
RX Data1
ACK
MMTXBE=1 MMNAKIF=1
MMTXIF=1 ^MMTXBE=0
DataN+2 → MMDTR
RX DataN
NAK STOP
MMTXBE=0
MMRXBF=0
MMRXIF=1
MMRXBF=1
MMATCH=1
MMSRW=0
Data1 → MMDRR
MMRXIF=1
MMRXBF=1
KEY: shaded data packets indicate a transmit by the MCU’s MMIIC module
DataN → MMDRR
MMRXIF=1
MMRXBF=1
Figure 15-8. Data Transfer Sequences for Master/Slave Transmit/Receive Modes
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor
Multi-Master IIC Interface (MMIIC)
Data Sheet
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