MC68HC908LD64 Datasheet, PDF (136/362 Pages) Freescale Semiconductor, Inc – Microcontrollers

System Integration Module (SIM)
COP — Computer Operating Properly Reset Bit
1 = Last reset caused by COP counter
0 = POR or read of SRSR
ILOP — Illegal Opcode Reset Bit
1 = Last reset caused by an illegal opcode
0 = POR or read of SRSR
ILAD — Illegal Address Reset Bit (opcode fetches only)
1 = Last reset caused by an opcode fetch from an illegal address
0 = POR or read of SRSR
USB — Universal Serial Bus Reset Bit
1 = Last reset caused by an USB module
0 = POR or read of SRSR
9.8.3 SIM Break Flag Control Register (SBFCR)
The SIM break flag control register contains a bit that enables software
to clear status bits while the MCU is in a break state.
Address: $FE03
Bit 7
6
5
4
3
2
1
Bit 0
Read:
BCFE
R
R
R
R
R
R
R
Write:
Reset: 0
R = Reserved
Figure 9-21. SIM Break Flag Control Register (SBFCR)
BCFE — Break Clear Flag Enable Bit
This read/write bit enables software to clear status bits by accessing
status registers while the MCU is in a break state. To clear status bits
during the break state, the BCFE bit must be set.
1 = Status bits clearable during break
0 = Status bits not clearable during break
Data Sheet
136
System Integration Module (SIM)
MC68HC908LD64 — Rev. 3.0
Freescale Semiconductor