EZ80L92MCU Datasheet, PDF (97/241 Pages) Zilog, Inc. – eZ80Acclaim Flash Microcontrollers

eZ80L92 MCU
Product Specification
82
[3:2]
00
CLK_DIV ₀₁
10
11
1
0
RST_EN ₁
0
0
PRT_EN ₁
Clock ÷ 4 is the timer input source.
Clock ÷ 16 is the timer input source.
Clock ÷ 64 is the timer input source.
Clock ÷ 256 is the timer input source.
The reload and restart function is disabled.
The reload and restart function is enabled. When a 1 is written
to RST_EN, the values in the reload registers are loaded into
the downcounter and the timer restarts.
The programmable reload timer is disabled.
The programmable reload timer is enabled.
Timer Data Registers—Low Byte
This Read-Only register returns the Low byte of the current count value of the selected
timer. The Timer Data Register—Low Byte, detailed in Table 33, can be read while the
timer is in operation. Reading the current count value does not affect timer operation. To
read the 16-bit data of the current count value, {TMRx_DR_H[7:0], TMRx_DR_L[7:0]},
first read the Timer Data Register—Low Byte and then read the Timer Data Register—
High Byte. The Timer Data Register—High Byte value is latched when a Read of the
Timer Data Register—Low Byte occurs.
Note: The Timer Data registers and Timer Reload registers share the same address
space.
Table 33. Timer Data Registers—Low Byte (TMR0_DR_L = 0081h, TMR1_DR_L =
0084h, TMR2_DR_L = 0087h, TMR3_DR_L = 008Ah, TMR4_DR_L = 008Dh, or
TMR5_DR_L = 0090h)
Bit
Reset
CPU Access
Note: R = Read only.
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
R
R
R
R
R
R
R
R
Bit
Position
[7:0]
TMRx_DR_L
Value Description
00h–FFh These bits represent the Low byte of the 2-byte timer data
value, {TMRx_DR_H[7:0], TMRx_DR_L[7:0]}. Bit 7 is bit 7
of the 16-bit timer data value. Bit 0 is bit 0 (lsb) of the 16-
bit timer data value.
PS013012-1004
PRELIMINARY
Programmable Reload Timers